Applications of memristors in conventional analogue electronics

This dissertation presents the steps employed to activate and utilise analogue memristive devices in conventional analogue circuits and beyond. TiO2 memristors are mainly utilised in this study, and their large variability in operation in between similar devices is identified. A specialised memristor characterisation instrument is designed and built to mitigate this issue and to allow access to large numbers of devices at a time. Its performance is quantified against linear resistors, crossbars of linear resistors, stand-alone memristive elements and crossbars of memristors. This platform allows for a wide range of different pulsing algorithms to be applied on individual devices, or on crossbars of memristive elements, and is used throughout this dissertation. Different ways of achieving analogue resistive switching from any device state are presented. Results of these are used to devise a state-of-art biasing parameter finder which automatically extracts pulsing parameters that induce repeatable analogue resistive switching. IV measurements taken during analogue resistive switching are then utilised to model the internal atomic structure of two devices, via fittings by the Simmons tunnelling barrier model. These reveal that voltage pulses modulate a nano-tunnelling gap along a conical shape. Further retention measurements are performed which reveal that under certain conditions, TiO2 memristors become volatile at short time scales. This volatile behaviour is then implemented into a novel SPICE volatile memristor model. These characterisation methods of solid-state devices allowed for inclusion of TiO2 memristors in practical electronic circuits. Firstly, in the context of large analogue resistive crossbars, a crosspoint reading method is analysed and improved via a 3-step technique. Its scaling performance is then quantified via SPICE simulations. Next, the observed volatile dynamics of memristors are exploited in two separate sequence detectors, with applications in neuromorphic engineering. Finally, the memristor as a programmable resistive weight is exploited to synthesise a memristive programmable gain amplifier and a practical memristive automatic gain control circuit.Open Acces

Emulating long-term synaptic dynamics with memristive devices

The potential of memristive devices is often seeing in implementing neuromorphic architectures for achieving brain-like computation. However, the designing procedures do not allow for extended manipulation of the material, unlike CMOS technology, the properties of the memristive material should be harnessed in the context of such computation, under the view that biological synapses are memristors. Here we demonstrate that single solid-state TiO2 memristors can exhibit associative plasticity phenomena observed in biological cortical synapses, and are captured by a phenomenological plasticity model called triplet rule. This rule comprises of a spike-timing dependent plasticity regime and a classical hebbian associative regime, and is compatible with a large amount of electrophysiology data. Via a set of experiments with our artificial, memristive, synapses we show that, contrary to conventional uses of solid-state memory, the co-existence of field- and thermally-driven switching mechanisms that could render bipolar and/or unipolar programming modes is a salient feature for capturing long-term potentiation and depression synaptic dynamics. We further demonstrate that the non-linear accumulating nature of memristors promotes long-term potentiating or depressing memory transitions

Emulating short-term synaptic dynamics with memristive devices

Neuromorphic architectures offer great promise for achieving computation capacities beyond conventional Von Neumann machines. The essential elements for achieving this vision are highly scalable synaptic mimics that do not undermine biological fidelity. Here we demonstrate that single solid-state TiO2 memristors can exhibit non-associative plasticity phenomena observed in biological synapses, supported by their metastable memory state transition properties. We show that, contrary to conventional uses of solid-state memory, the existence of rate-limiting volatility is a key feature for capturing short-term synaptic dynamics. We also show how the temporal dynamics of our prototypes can be exploited to implement spatio-temporal computation, demonstrating the memristors full potential for building biophysically realistic neural processing systems

Unsupervised learning in probabilistic neural networks with multi-state metal-oxide memristive synapses

In an increasingly data-rich world the need for developing computing systems that cannot only process, but ideally also interpret big data is becoming continuously more pressing. Brain-inspired concepts have shown great promise towards addressing this need. Here we demonstrate unsupervised learning in a probabilistic neural network that utilizes metal-oxide memristive devices as multi-state synapses. Our approach can be exploited for processing unlabelled data and can adapt to time-varying clusters that underlie incoming data by supporting the capability of reversible unsupervised learning. The potential of this work is showcased through the demonstration of successful learning in the presence of corrupted input data and probabilistic neurons, thus paving the way towards robust big-data processors

An FPGA-based instrument for en-masse RRAM characterization with ns pulsing resolution

An FPGA-based instrument with capabilities of on-board oscilloscope and nanoscale pulsing (70 ns @ \pm 10 V) is presented, thus allowing exploration of the nano-scale switching of RRAM devices. The system possesses less than 1% read-out error for resistance range between 1 text{k}\Omega to 1 text{M}\Omega , and demonstrated its functionality on characterizing solid-state prototype RRAM devices on wafer; devices exhibiting gradual switching behavior under pulsing with duration spanning between 30 ns to 100 \µs. The data conversion error-induced degradation on read-out accuracy is studied extensively and verified by standard linear resistor measurements. The integrated oscilloscope capability extends the versatility of our instrument, rendering a powerful tool for processing development of emerging memory technologies but also for testing theoretical hypotheses arising in the new field of memristors

A µ-controller-based system for interfacing selector-less RRAM crossbar arrays

Selectorless crossbar arrays of resistive random access memory (RRAM), also known as memristors, conduct large sneak currents during operation, which can significantly corrupt the accuracy of cross-point analog resistance (Mt) measurements. In order to mitigate this issue, we have designed, built, and tested a memristor characterization and testing (mCAT) instrument that forces redistribution of sneak currents within the crossbar array, dramatically increasing Mt measurement accuracy. We calibrated the mCAT using a custom-made 32 × 32 discrete resistive crossbar array, and subsequently demonstrated its functionality on solid-state TiO2-x RRAM arrays, on wafer and packaged, of the same size. Our platform can measure standalone Mt in the range of 1 kΩ to 1 MΩ with <1% error. For our custom resistive crossbar, 90% of devices of the same resistance range were measured with <10% error. The platform's limitations have been quantified using large-scale nonideal crossbar simulations

Live demonstration: characterization of RRAM crossbar arrays at a click of a button

We demonstrate a desktop platform which has the ability of fully characterizing RRAM crossbar arrays while not compromising on ease-of-use. The setup consists of our bespoke PCB system connected to a local PC (laptop), on which a Pyhton interface allows the user to directly interact with individual RRAM cells packaged in either crossbar or stand-alone configurations. The platform is capable of current-compliant forming among other exotic pulsing schemes, used for exposing IV and switching characteristics or utilising the devices for a wide range of applications. These operations can be applied on one, or several cells, in an automated fashion, drastically accelerating data acquisition

A cell classifier for RRAM process development (Dataset)

Devices that exhibit resistive switching are promising components for future nanoelectronics with applications ranging from emerging memory to neuromorphic computing and biosensors. In this work, we present an algorithm for identifying switchable devices i.e. devices that can be programmed in distinct resistive states and which change their state predictably and repeatably in response to input stimuli. The method is based on extrapolating the statistical significance of difference in between two distinct resistive states as measured from devices subjected to standardised bias protocols. The test routine is applied on distinct elements of 32x32 RRAM crossbar arrays and yields a measure of device switchability in the form of a statistical significance pvalue. Ranking devices by p-value shows that switchable devices are typically found in the bottom 10% and are therefore easily distinguishable from non-functional devices. Implementation of this algorithm dramatically cuts RRAM testing time by granting fast access to the best devices in each array as well as yield metrics.</span

Emulating short-term synaptic dynamics with memristive devices

Neuromorphic architectures offer great promise for achieving computation capacities beyond conventional Von Neumann machines. The essential elements for achieving this vision are highly scalable synaptic mimics that do not undermine biological fidelity. Here we demonstrate that single solid-state TiO2 memristors can exhibit non-associative plasticity phenomena observed in biological synapses, supported by their metastable memory state transition properties. We show that, contrary to conventional uses of solid-state memory, the existence of rate-limiting volatility is a key feature for capturing short-term synaptic dynamics. We also show how the temporal dynamics of our prototypes can be exploited to implement spatio-temporal computation, demonstrating the memristors full potential for building biophysically realistic neural processing systems.</span